1. Field of the Invention
The present invention relates to a thin film magnetic memory device, and more particularly to a random access memory including memory cells having magnetic tunnel junctions (MTJ).
2. Description of the Background Art
Attention has been paid to an MRAM (Magnetic Random Access Memory) device as a memory capable of storing data in a nonvolatile manner with low power consumption. MRAM device is a memory which stores nonvolatile data using a plurality of thin film magnetic materials formed on a semiconductor integrated circuit, and which can randomly access the respective thin film magnetic materials.
Recently, it is particularly made public that the performance of MRAM device surprisingly develops by employing thin film magnetic materials utilizing magnetic tunnel junctions as memory cells.
FIG. 21 is a schematic diagram showing the configuration of a memory cell having a tunnel junction (also simply referred to as “MTJ memory cell” hereinafter).
Referring to FIG. 21, the MTJ memory cell includes a tunnel magneto-resistance element TMR the electric resistance of which changes according to the data level of magnetically written, stored data, and an access transistor ATR. Access transistor ATR is coupled in series to tunnel magneto-resistance element TMR between a bit line BL and a source line SL. A field effect transistor formed on a semiconductor substrate is typically employed as access transistor ATR.
Relative to the MTJ memory cell, bit line BL and write digit line WDL for supplying data write currents in different directions during data write, respectively, and word line WL for instructing data read, are provided. If data is to be read, tunnel magneto-resistance element TMR is electrically coupled between bit line BL and source line SL the voltage of which is set at a fixed voltage Vss when access transistor ATR is turned on.
FIG. 22 is a conceptual view for describing a data write operation for writing data to an MTJ memory cell.
Referring to FIG. 22, tunnel magneto-resistance element TMR includes a fixed ferromagnetic body layer having a constant magnetic direction (also simply referred to as “fixed magnetic layer” hereinafter) FL, and a ferromagnetic body layer magnetized in a direction to a magnetic field applied from the outside (to be also simply referred to as “free magnetic layer” hereinafter) VL. A tunneling barrier (tunneling film) TB formed out of an insulator film is provided between fixed magnetization layer FL and free magnetization layer VL. Free magnetic layer VL is magnetized in a direction equal to or opposite (nonparallel) to the magnetic direction of fixed magnetic layer FL, depending on the level of written stored data. Fixed magnetic layer FL, tunneling barrier TB and free magnetic layer VL form a magnetic tunnel junction.
The electric resistance of tunnel magneto-resistance element TMR changes according to the relative relationship in magnetic direction between fixed magnetic layer FL and free magnetic layer VL. Specifically, the electric resistance of magneto-resistance element TMR becomes a minimum Rmin if the magnetic direction of fixed magnetic layer FL is parallel to that of free magnetic layer VL, and becomes a maximum Rmax if the magnetic direction of fixed magnetic layer FL is opposite (nonparallel) to that of free magnetic layer VL.
If data is to be written, word line WL is deactivated and access transistor ATR is turned off. In this state, data write currents (±Iw) for magnetizing free magnetic layer VL are carried to bit line BL and write digit line WDL in directions according to the level of written data, respectively.
FIG. 23 is a conceptual view showing the relationship between a data write current and the magnetic direction of a tunnel magneto-resistance element during data write.
Referring to FIG. 23, the horizontal axis H(EA) indicates a magnetic field applied to free magnetic layer VL in tunnel magneto-resistance element TMR in an easy axis (EA: Easy Axis) direction, and the vertical axis H(HA) indicates a magnetic field acting on free magnetic layer VL in a hard axis (HA: Hard Axis) direction. Magnetic fields H(EA) and H(HA) correspond to two magnetic fields generated by currents carried to bit line BL and write digit line WDL, respectively.
In the MTJ memory cell, the magnetic direction in which fixed magnetic layer FL is fixed is along the easy axis of free magnetic layer VL, and free magnetic layer VL is magnetized in a direction parallel or nonparallel (opposite) to the magnetic direction of fixed magnetic layer FL along the easy axis direction, depending on the level (“1” or “0”) of stored data, respectively. The MTJ memory cell can store 1-bit data (“1” or “0”) to correspond to one of the two magnetic directions of free magnetic layer VL.
The magnetic direction of free magnetic layer VL is newly rewritten only in the case where the sum of magnetic fields H(EA) and H(HA) to be applied reaches the outer region of an asteroid characteristic line shown in the figure. More specifically, in the case where the applied data write magnetic field has intensity corresponding to the inner region of the asteroid characteristic line, the magnetic direction of free magnetic layer VL does not change.
As indicated by an asteroid characteristic line, it is possible to decrease a magnetization threshold value necessary to change the magnetic direction along the easy axis by applying a magnetic field to free magnetic layer VL in the hard axis direction.
If operating points during data write are designed as shown in FIG. 23, the data write magnetic field in the easy axis direction in the MTJ memory cell to which data is written is designed to have an intensity of HWR. In other words, a data write current carried to bit line BL or write digit line WDL is designed so as to obtain data write magnetic field HWR. Normally, data write magnetic field HWR is expressed as a sum of a switching magnetic field HSW necessary to change the magnetic direction and a margin ΔH. That is, HWR=HSW+ΔH.
To rewrite the stored data of the MTJ memory cell, i.e., to change the magnetic direction of tunnel magneto-resistance element TMR, it is necessary to carry a data write current equal to or higher than predetermined level to both write digit line WDL and bit line BL. By doing so, free magnetic layer VL in tunnel magneto-resistance element TMR is magnetized in a direction parallel or opposite (nonparallel) to the magnetic direction of fixed magnetic layer FL in accordance with the direction of the data write magnetic field along the easy axis (EA). The magnetic direction, i.e., the stored data of the MTJ memory cell which is once written to tunnel magneto-resistance element TMR is kept nonvolatile until new data is written.
FIG. 24 is a conceptual view for describing a data read operation for reading data from an MTJ memory cell.
Referring to FIG. 24, if data is to be read, access transistor ATR is turned on in response to the activation of word line WL. In addition, the voltage of bit line BL is fixed to fixed voltage Vss. As a result, tunnel magneto-resistance element TMR is electrically coupled to bit line BL while the voltage of TMR is pulled down to fixed voltage Vss.
In this state, if the voltage of bit line BL is pulled up to a predetermined voltage, a memory cell current Icell according to the electric resistance of tunnel magneto-resistance element TMR, i.e., the stored data of the MTJ memory cell passes through a current path including bit line BL and tunnel magneto-resistance element TMR. By comparing memory cell current Icell with, for example, a predetermined reference current, it is possible to read the stored data from the MTJ memory cell.
In this way, the electric resistance of tunnel magneto-resistance element TMR changes according to the applied data write magnetic field, i.e., rewritable magnetic direction. Due to this, electric resistances Rmax/Rmin of tunnel magneto-resistance element TMR are made correspond to the level (“1”/“0”) of the stored data, respectively, whereby it is possible to execute nonvolatile data storage.
FIG. 25 is a block diagram of an MTJ memory cell employing above-described access transistor ATR.
Referring to FIG. 25, access transistor ATR formed on a semiconductor substrate SUB includes source/drain regions 310 and 320 which are n type regions, and a gate region. Word line WL which serves as the gate of access transistor ATR is formed on an upper layer of a p type gate region. Write digit line WDL is arranged on an upper layer of source/drain region 310. Tunnel magneto-resistance element TMR is arranged on an layer of write digit line WDL. Tunnel magneto-resistance element TMR is electrically coupled to source/drain region 320 of access transistor ATR through a metallic film formed in a contact hole. Bit line BL is electrically coupled to tunnel magneto-resistance element TMR, and provided on an upper layer of tunnel magneto-resistance element TMR.
Further, as the MTJ memory cell used to store data, a memory cell which uses a diode element as an access element in place of access transistor ATR can be employed.
FIG. 26 is a block diagram showing the configuration of an MTJ memory cell which uses a diode element as an access element.
Referring to FIG. 26, a memory cell using a diode element as an access element, includes tunnel magneto-resistance element TMR and access diode DY. Access diode DY has an anode electrically coupled to magneto-resistance element TMR and a cathode electrically coupled to source line SL. Bit line BL is provided in a direction in which bit line BL intersects with source line SL, and coupled to tunnel magneto-resistance element TMR. A data write operation for writing data to the memory cell is carried out by supplying data write currents to both source line SL and bit line BL, respectively. The directions of the data write currents are set according to the data level of written data as in the case of the memory cell using the access transistor.
If data is to be read, source line SL corresponding to a selected memory cell is set to have low voltage (e.g., a ground voltage GND). At this time, by precharging bit line BL with high voltage (e.g., a power supply voltage Vcc), access diode DY is biased in a forward direction to become conductive, and memory cell current Icell passes through tunnel magneto-resistance element TMR. In this way, even if the MTJ memory cell uses the access diode, it is possible to execute data read and data write operations.
FIG. 27 is a block diagram of an MTJ memory cell which uses above-described access diode DY.
Referring to FIG. 27, access diode DY is formed on an upper layer of source line SL. Tunnel magneto-resistance element TMR is formed on an upper layer of access diode DY and electrically coupled to bit line BL. In access diode DY, a p type region and an n type region are formed so that the anode of access diode DY is electrically coupled to tunnel magneto-resistance element TMR and the cathode thereof is electrically coupled to source line SL. Accordingly, the MTJ memory cell using this access diode DY has an advantage in that the layout area of this MTJ memory cell is smaller than that of the MTJ memory cell which uses access transistor ATR described above.
As can be seen, it is possible to execute data storage using various types of MTJ memory cells in a MRAM device.
Meanwhile, an MRAM device normally includes not only MTJ memory cells for executing data storage but also a reference cell for generating a reference current to be compared with memory cell current Icell. It is necessary to set the reference current generated by the reference cell to be the intermediate value of two memory cell currents Icell corresponding to two electric resistances Rmax and Rmin of each MTJ memory cell, respectively. Basically, this reference cell is designed to include same tunnel magneto-resistance element as that used in the MTJ memory cell.
A pass current which passes through tunnel magneto-resistance element TMR is largely influenced by the thickness of the insulating film used as the tunneling film. Due to this, the thickness of the tunneling film of the MTJ memory cell differs from that of the tunneling film of the reference cell, the reference current cannot be set at desired level. Further, since the tunneling film is designed to be thin, only low voltage level, e.g., a voltage equal to or lower than about 0.5 V can be applied to the tunneling film. However, the reference cell using access diode DY operates in a built potential voltage region at 0.5 V. As a result, the pass current may possibly greatly change in response to even a small fluctuation in voltage. For this reason, it is difficult to accurately set the level of the reference current generated by the reference cell and there is a fear of the deterioration of data read accuracy due to the fluctuation in reference current.
In case of ordinary MTJ memory cell, in particular, a resistance difference ΔR which is generated according to the level of the stored data is not so large. Typically, electric resistance Rmin is within about several tens of percentage of electric resistance Rmax. Due to this, the change of memory cell Icell according to the level of the stored data is not so large and limited in the order of microamperes (μA: 10−6 A). It is, therefore, necessary to improve the accuracy of steps of manufacturing the tunneling film of an MTJ memory cell and that of a reference cell.
However, if tunnel thickness accuracy is set strict in manufacturing process, it is considered that manufacturing cost hike accompanying the deterioration of manufacturing yield may occur. In this background, it is demanded to provide the configuration of an MRAM device which executes a data read operation with high accuracy on the basis of resistance difference ΔR of an MTJ memory cell without making manufacturing steps too strict.
To solve these disadvantages, the configuration of an MRAM device which executes a data read operation only by accessing a selected memory cell without using a reference cell, i.e., executes so-called “self-reference” data read is disclosed by U.S. Pat. No. 6,317,376 B1.
According to the conventional self-reference read disclosed by the U.S. Pat. No. 6,317,376 B1, one data read operation consists of (1) an operation for reading stored data from a selected memory cell, (2) that for reading data after forcedly writing “0” data to the selected memory cell, (3) that for reading data after forcedly writing “1” data to the selected memory cell, (4) that for generating read data on the basis of the read results of (1) to (3), and that for rewriting (restoring) read data to the selected memory cell, which operations are continuously executed. By performing such a data read operation, data read can be executed only by accessing the selected memory cell. Therefore, it is possible to execute high accuracy data read without being influenced by manufacturing irregularities of the reference cells.
Nevertheless, according to the conventional self-reference read, it is necessary to repeatedly execute forced data write and data read in one data read operation. Due to this, it takes disadvantageously long time from the start of the data read until the completion of the data read, and the acceleration of the data read operation is disadvantageously prevented.